Photodiodes or photodetectors including PINs and avalanche photodiodes (APDs) are widely used in fiberoptic and optical applications to convert received light into an electrical current signal. The photodiodes require a fast response time to be able to operate in high speed data transmission systems.
Photodiodes with a fast response time as used in such high speed signal transmission are especially vulnerable to damage from electrostatic discharge (ESD). The susceptibility of an electronic component to ESD is measured in terms of an ESD threshold. The higher the threshold, the more robust the component is against damage.
Typically the bandwidth of a photodiode is limited by the product of its capacitance and series resistance, known as its RC constant. In most photodiodes the capacitance of the p-n junction or junction capacitance is the main contributor to the total capacitance. Thus, to achieve a high bandwidth, it is necessary to reduce the junction capacitance by making the photodiode active area as small as possible.
However, in general, the ESD threshold is proportional to the size of the active area. The smaller the active area, the lower the ESD threshold and the more vulnerable is the photodiode to ESD damage. For photodiodes with a speed capability above 2.5 Gbps, the typical ESD threshold is below 50 Volt. The low ESD threshold is a very serious issue to photodiode manufacturing. It results in a low assembly yield even when high cost ESD protection equipment and procedures are implemented.
FIG. 1a is a plan view of the schematic structure of a typical p-i-n photodiode 100 fabricated as a chip from a wafer substrate. In III-V compound semiconductor systems, such as indium phosphide (InP), indium gallium arsenide (InGaAs), gallium arsenide (GaAs) and similar, the p-i-n structure is epitaxially grown on either n-doped or semi-insulating substrate. For operation at wavelengths of interest to fiberoptic telecommunications, InP is a preferred substrate material.
A p-region 1 with periphery 1a is formed by a localized p-type dopant diffusion process through a diffusion mask. Typically zinc (Zn) is used as the p-type dopant. The surface of the p-i-n photodiode 100 is passivated with a dielectric insulating layer 5, typically silicon nitride (SiNx).
To make a contact with the anode of the photodiode, an annular metal contact ring 2 is deposited through an annular opening or via 6 in the insulating layer 5 inside the periphery of the p-region 1. The metal contact ring 2 is annular to permit optical light signals 8 to enter from the front of the photodiode 100. The width of the metal contact ring 2 is made as small as possible to maximize the optically sensitive area of the photodiode 100, which corresponds to the inner diameter of the metal contact ring 2. Titanium/platinum/gold (Ti/Pt/Au) is a suitable metal combination for the metal contact ring 2.
A bond pad 3 for making an external connection to the photodiode anode with a wire bond is deposited on the dielectric insulating layer 5, connected to the metal contact ring 2 by a metal connecting link 4. Arrows A-A′ indicate the location of a cross-section of the photodiode shown in FIG. 1b. 
With reference to FIG. 1b, in the p-i-n photodiode 100 an InP substrate 10 supports an n-type layer structure comprising a n-doped InP buffer layer 11 0.3-1.0 μm thick, an unintentionally doped InGaAs absorption layer 12 0.8-4 μm thick, and a n-doped or unintentionally doped InP window layer 13. A p-n junction 1b is formed in the absorption layer 12 by the localized p-type dopant diffusion process to form the p-region 1.
The metal contact ring 2 is generally deposited on a thin highly-doped p-type InGaAs layer 7 to lower the contact resistivity, thereby reducing the photodiode series resistance.
A contact to the cathode of the photodiode (not shown) is usually deposited on the bottom of the InP substrate 10 in the case where it is of a conducting n-type. Alternatively, if the InP substrate 10 is semi-insulating, a cathode connection can be made to the n-type layers from the top of the photodiode.
Photodiode structures have been disclosed in prior art that aim at increasing the ESD threshold.
Derkits, Jr. et al. (U.S. Pat. No. 6,835,984 “ESD resistant device”) disclose a semiconductor device such as a photodetector electrostatic discharge (ESD) protection structure. A dielectric layer is disposed on the active region layer, and a metal active region contact is disposed in the dielectric layer above the active region and electrically contacting the active region. An annular metal guard ring constituting the ESD protection structure is disposed in the dielectric layer around the active region contact, wherein the ESD protection structure electrically contacts the active region layer of the substrate to provide an ESD discharge path for charge on the surface of the dielectric layer.
While the metal guard ring provides a means for discharging surface charge on the larger surface portion of the dielectric layer, it does not provide direct ESD protection for the photodiode anode.
Maoyou Sun and Yicheng Lu have proposed a guard ring structure to improve the ESD threshold of an InGaAs photodiode in a paper “Nonlinearity in ESD robust InGaAs p-i-n photodiode” published in Electron Devices, IEEE Transactions on, vol. 52, Issue 7, pp 1508-1513, 2005. However, the guard ring increases the overall photodiode capacitance which tends to reduce the photodiode bandwidth and linearity.
It is an object of the invention to provide a photodiode structure with an improved ESD damage threshold by lowering the ESD induced current density.
A further object of the invention is to achieve a lower ESD-induced current density by providing a local widening of the ring contact at the intersection of the connection to the bond pad, incorporating a low conductivity layer to promote lateral current spreading and increasing the series resistance of the photodiode by increasing the contact resistivity of the anode contact.